An important feature of many integrated circuit (IC) devices can be the ability to store a data value. Numerous examples of conventional storage devices are known, including nonvolatile storage devices and volatile storage devices. Volatile storage devices can include static random access memories (SRAMs) as well as dynamic RAMs (DRAMs). DRAMs are often preferred in many applications due to their lower power consumption and smaller cell size.
A typical conventional DRAM cell includes a metal-oxide-semiconductor (MOS) pass transistor and a storage capacitor. A DRAM capacitor can have many configurations. As but one example, a DRAM capacitor can be a “trench” capacitor formed in a substrate. Thus, in such arrangements substrate area must be dedicated for both the storage capacitor and the corresponding pass transistor. Alternatively, capacitors can be formed over a substrate, including capacitor-over-bit line architectures, in which the capacitor extends over a bit connected to each cell of a column, and bit-line-over-capacitor architectures, in which the capacitors extends below the bit lines of each column. A drawback to such arrangements can be the complexity involved in manufacturing the capacitor structures. For devices having capacitors formed over a substrate, a cell must still include a contact location to connect one plate of the capacitor to the corresponding pass transistor.
For DRAM memory cells, a charge state of the capacitor corresponds to the data value stored. However, because charge can leak from a DRAM capacitor, such cells require a periodic “refresh”. This is one drawback to DRAM memories, the need to refresh data values periodically in order to ensure data values are not lost.
Another type of memory cell, capable of storing multilevel analog information is disclosed in “Multilevel Random—Access Memory Using One Transistor Per Cell”, IEEE Journal of Solid-State Circuits, Vol. SC-11, No. 4, August 1976, by Heald et al.